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[Embeded-SCM Developsaa7113

Description: saa7113视频解码芯片外围电路设计原理图,可供大家参考设计-saa7113 video decoder chip peripheral circuit design schematics, reference design for everyone
Platform: | Size: 17408 | Author: 穆垚 | Hits:

[Graph Recognizesaa7113shipincaiji

Description: 视频图像采集verilog HDl源程序,视频解码芯片部分的,可以供参考-Video image acquisition verilog HDl source, part of the video decoder chip, you can for reference
Platform: | Size: 8192 | Author: 穆垚 | Hits:

[Streaming Mpeg4H.264

Description: 本书在介绍数字视频和视频编码的基本原理基础上,论述了H264的特点、编码器原理、解码器原理以及编解码器的实现方案。-This book, introducing digital video and video encoding based on the basic principles, discusses the characteristics of H264, encoder principle, the principle of the decoder and codec realization of the program.
Platform: | Size: 11018240 | Author: 许菀纯 | Hits:

[DSP programapps

Description: DM6446的codec engine 应用端算法源码,包括video,audio,speech等开发实例。-DM6446-side of the codec engine algorithm source applications, including video, audio, speech, such as the development of examples.
Platform: | Size: 1067008 | Author: bing | Hits:

[Streaming Mpeg4SOPC_MPEG4_decorder_design

Description: 基于SOPC的MPEG4视频解码器的设计方案-Based on SOPC of MPEG4 video decoder design
Platform: | Size: 264192 | Author: 张贺 | Hits:

[Multimedia programnova.tar

Description: video decoder full hardware
Platform: | Size: 746496 | Author: esl | Hits:

[Special Effectsvideo_process_base_on_DSPandFPGA

Description: 基于高速数字信号处理器(DSP) 和大规模现场可编程门阵列( FPGA) ,成功地研制了小型 化、低功耗的实时视频采集、处理和显示平台. 其中的DSP 负责图像处理,其外围的全部数字逻辑功能都集成在一片FPGA 内,包括高速视频流FIFO、同步时序产生与控制、接口逻辑转换和对视频编/ 解码器进行设置的I2 C 控制核等. 通过增大FIFO 位宽、提高传输带宽,降低了占用EMIF 总线的时间 利用数字延迟锁相环逻辑,提高了显示接口时序控制精度. 系统软件由驱动层、管理层和应用层组成,使得硬件管理与算法程序设计彼此分离,并能协同工作. 系统中的图像缓冲区采用了 三帧的配置方案,使得该平台最终具有对PAL/ N TSC 两种制式的全分辨率彩色复合视频信号进行实时采集、显示和处理的能力.-Based on high-speed digital signal processor (DSP) and large-scale field programmable gate array (FPGA), successfully developed a smaller, low-power real-time video capture, processing and display platform. One of the DSP is responsible for image processing, all its external digital logic functions are integrated in a FPGA, including high-speed video streaming FIFO, synchronous sequential generate and control, conversion and interface logic for video encoder/decoder to set up the control of nuclear and other I2 C. through increased FIFO bit width, increase the transmission bandwidth, reducing the time occupied by EMIF bus delay phase-locked loop using digital logic,
Platform: | Size: 546816 | Author: John | Hits:

[Compress-Decompress algrithmsMQdecoder

Description: Verilog HDL 实现的JPEG200的MQ解码-JPEG2000 MQ DECODER BASED ON FPGA, Verilog HDL
Platform: | Size: 1518592 | Author: 林木 | Hits:

[VHDL-FPGA-Verilogxapp288

Description: This the reference design file for XAPP288 " SDI Video Decoder" it includes both VHDL and Verilog versions -This is the reference design file for XAPP288 " SDI Video Decoder" it includes both VHDL and Verilog versions
Platform: | Size: 68608 | Author: zhangxinxin | Hits:

[VHDL-FPGA-Verilog61EDA_C878

Description: fpga tv转vga 解码器adv7180,视频转换adv7123-fpga tv to vga,decoder adv7180,video converter adv7123
Platform: | Size: 2042880 | Author: james | Hits:

[mpeg mp3H.264

Description: 关于h.264视频解码器完全源码(verilog)-With regard to h.264 video decoder full source code (verilog)
Platform: | Size: 836608 | Author: 李风志 | Hits:

[VHDL-FPGA-Verilogd1_dec

Description: d1(BT.656) video decoder VHDL code
Platform: | Size: 1024 | Author: thorn | Hits:

[VHDL-FPGA-VerilogSAA7113forVideo

Description: FPGA控制SAA7113实现视频解码。SAA7113是高集成度视频解码芯片。-FPGA Control SAA7113 video decoder implementation. SAA7113 is a highly integrated video decoder chip.
Platform: | Size: 3256320 | Author: | Hits:

[VHDL-FPGA-VerilogWBIIC

Description: 基于IIC Controller实现的对TP401视频解码芯片的工作模式配置。-IIC Controller implementation based on the TP401 video decoder chip mode configuration.
Platform: | Size: 3072 | Author: 左左 | Hits:

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